This invention relates to driver devices for controlling a duty ratio control solenoid type valve (referred to as a duty solenoid valve) in order to adjust the flow rate or pressure of a fluid.
FIG. 11 shows a typical organization of a duty solenoid valve for controlling oil pressure. The duty solenoid valve includes an input port 10 to which a supply pressure Pa is applied; a drain port 11 usually having a pressure equal to atmospheric pressure Pex; and an output port 12, having a control pressure Pc which is determined by the duty ratio of the valve, i.e., the ratio of the time lengths at which passage is provided between the output port 12 and the input port 10 and when passage is provided between the output port 12 and the drain port 11, respectively. When the solenoid 17 is not energized, the ball 14 is urged on the valve seat Sc by the spring 16, such that passage is provided between the output port 12 and the drain 11, thereby lowering the control pressure Pc toward the drain pressure Pex. When, on the other hand, the solenoid 17 is energized, the plunger 13 is attracted by the solenoid 17 against the urging force of the spring 16 and the ball 14 is retracted to the valve seat So, such that passage is provided between the output port 12 and the input 10, thereby raising the control pressure Pc toward the supply pressure Pa. Thus, the control or output pressure Pc may be adjusted to a target level by controlling the duty ratio or the energization time ratio of the solenoid 17.
FIG. 12 shows the relation between the duty ratio of the solenoid 17 and the control pressure Pc. When the duty ratio is in the neighborhood of 0%, the length of time during which the input port 10 and the output port 12 are coupled to each other is so short that the control pressure Pc is equal to the drain pressure Pex. When, on the other hand, the duty ratio is in the neighborhood of 100%, the length of time during which the output port 12 and the drain port 11 are coupled to each other is so short that the control pressure Pc is equal to the supply pressure Pa. However, except for these non-sensitive duty ratio regions near 0% and 100%, the control pressure Pc is substantially proportional to the duty ratio.
FIG. 13 shows the waveform of the excitation current supplied to the solenoid 17. The duty ratio is equal to (Tx/To).times.100%, since the solenoid 17 is energized for the time Tx during one cycle period To. An overexcitation current I.sub.H is supplied for a short period of time Tc at the head of energization time Tx, such that the ball 14 is quickly moved from the seat Sc to the seat So. Thereafter, the excitation current is reduced to a lower hold level I.sub.L. The overexcitation period Tc is selected somewhat longer than the time required to complete the movement of the ball 14 from the seat Sc to the seat So.
In the case of a voltage control type driver system where the current level is raised to the overexcitation level I.sub.H by increasing the voltage applied across the solenoid 17 and an automotive battery is utilized as the voltage source, the excitation current level may vary greatly due to the variation of the supply voltage or the thermal variation of the resistance of the solenoid 17. Further, in the case of such a system a resistance is connected serially with the solenoid 17 to lower the excitation current to the low level I.sub.L. This serial insertion of a resistance results in a substantial loss of power. Thus, the excitation current level is usually controlled to predetermined constant overexcitation level I.sub.H and hold level I.sub.L by means of an elecronic control system.
FIG. 14 shows a conventional control driver circuit for the solenoid 17. A microcomputer 20, comprising a CPU 21, ROM 22, RAM 23, I/O port 24, timer 25, and a data bus 26, determines the duty ratio (Tx/To) of the solenoid 17 as required by the target control pressure Pc, in accordance with the relation between the duty ratio and the control pressure Pc shown in FIG. 12, and outputs a corresponding duty pulse signal from the output terminal OUT1. The duty pulse signal from OUT1 is held at a high level H during the excitation time Tx. Further, an overexcitation signal, held at a low level L during the overexcitation time Tc, is outputted from the terminal OUT2.
The duty pulse signal and the overexcitation signal are generated by means of the timer 25 of the microcomputer 20. FIG. 15 shows the detailed organization of the timer 25, while FIG. 16 is a timing chart for describing the operations of the timer 25. A pre-scaler 50 divides the clock frequency of the microcomputer 20 by 1/N, and a 16-bit free-running counter 51 counts the number of clock pulses from the pre-scaler 50. The demultiplication factor 1/N can be set by the bits B3, B4, B5 of the timer-counter and status register 56 by means of a program. Thus, the content of the 16-bit free-running counter 51 changes as shown in FIG. 16(a), overflowing and reset at the end of each period To at r3 or FFFFH in hexadecimal. The 16-bit reference registors A and B (52 and 54) store reference values r1 and r2 (see FIG. 16(a)) corresponding to Tc and Tx, respectively. Thus, the comparator A 53 sets the comparison bit Bo of the counter 56 when the content of the free-running counter 51 reaches r1; on the other hand, the comparator B 55 sets the comparison bit B2 when the content of the counter 51 reaches r2. Further, a timer overflow flag B1 is set each time when the free-running counter 51 overflows at r3. An interrupt is generated by the OR gate 57 when one of the bits B0 through B2 is set.
The interrupt generated by the OR gate 57 starts an interrupt routine within the microcomputer 20, shown in FIG. 17. The steps S3 and S5 corresponds to the time points at which the content of the free-running counter 51 reaches r1 and r2, respectively; when the content of the free-running counter reaches r3, the steps S6 through S9 are executed. Thus, there are generated: an overexcitation signal having the waveform as shown in FIG. 16(b) (note that the low level L corresponds to the supply of the overexcitation signal), and the duty pulse signal having the waveform of FIG. 16(c) (note that the high level H corresponds to the supply the excitation current). The reference values r1 and r2 are set at steps S8 and S9 such that the duty ratio Tx/To and the overexcitation time Tc are adjusted properly in accordance with the target control pressure Pc, etc.
FIG. 18 shows the waveforms occurring in the circuit of FIG. 14. The waveforms at FIG. 18(a) and (b) represent the duty pulse signal and the overexcitation signal, respectively, outputted from OUT1 and OUT2 of the microcomputer; the waveform at (c) represents the non-inverting input signal to the operational amplifier 36 (voltage at point P); the solid and the dotted waveforms at (d) represent the inverting and non-inverting input to the comparator 38, respectively; the waveform at (e) represents the output of the AND gate 39; and the waveform at (f) represents the excitation current flowing through the solenoid 17.
The transistor 45, coupled serially with the solenoid 17, is turned on and off in response to the high level H and the low level L of the duty pulse signal from OUT1, thereby turning on and off the excitation current flowing through the solenoid 17. The Zener diode 46 suppresses the surge voltage that is developed when the transistor 45 is turned off. During the overexcitation time Tc, the level of the overexcitation signal from OUT2 is at the low level L, such that the transistor 43 is turned off and the voltage at point P is at a first (higher) predetermined level as determined by the voltage divider consisting of the resistors 40 and 41; during the rest of the excitation time (Tx-Tc) when the overexcitation signal is at the high level H (i.e., is negated), the transistor 43 is turned on, such that the voltage at the point P is at a second (lower) predetermined level as determined by the ratio of the resistors 40 and 42. The error amplifier 33 amplifies the error or difference between the voltage at point P and the voltage at Q (corresponding to the excitation current through solenoid 17). The output of the error amplifier 33 becomes greater when the voltage at Q becomes smaller. Thus, the comparator 38 outputs a PWM (pulse-width modulation) output as shown in FIG. 18(e) and supplies it to the the AND gate 39. The transistors 31 and 27 are turned on and off in response to the output of the AND gate 39. Thus, the excitation current through the solenoid 17 is controlled to the predetermined levels I.sub.H and I.sub.L (see FIG. 18(f)) during the periods Tc and (Tx-Tc), respectively, as determined by the two predetermined voltage levels at point P. When the excitation signal from OUT1 falls to the low level L, the transistor 45 is turned off and the excitation current is thereby interrupted.
The above conventional driver device for a duty solenoid valve has the following disadvantages. Namely, the driver comprises, for controlling the excitation current to a predetermined level, an error amplifier 33, a triangular waveform generator 37, a voltage comparator 38, and an AND gate 39; further, for switching the excitation current level between two predetermined high and low levels I.sub.H and I.sub.L, the driver device includes a transistor 43 and resistors 40 through 42 and 44. Thus, the circuit is complicated in organization and large in size. Further, the failures within the circuit, such as the disconnection of the solenoid 17 or the short circuit of the transistor 27, cannot readily be detected.